1. Field of the Invention
The present invention relates to a hysteresis circuit which varies a threshold level for inverting the condition of an output according to the condition of the output, the hysteresis being suitable, for example, for determining a power supply condition.
2. Description of the Prior Art
Referring to FIG. 1, there is shown a conventional hysteresis circuit. Reference numerals 1, 2 and 3 represent resistors connected in series to serve as a voltage divider for dividing a reference voltage V.sub.ref supplied from a constant voltage circuit not affected by temperature variation. Reference numeral 4 represents a comparator which compares with an input voltage a potential at a voltage divided point a between the resistors 1 and 2 as a reference level, i.e. as a threshold level. Reference numeral 5 represents a switching transistor which varies the threshold level of the comparator 4 in order that the input and output characteristic of the comparator 4 has hysteresis.
The collector and emitter lines of the switching transistor 5 are respectively connected to a voltage divided point between the resistors 2 and 3 and to ground so that the transistor 5 is turned ON and OFF by a feedback circuit 6 according to the output condition of the comparator 4. Specifically, based on the output from the feedback circuit 6, the switching transistor 5 is OFF when the output of the comparator 4 is of low level and is ON when the output of the comparator 4 is of high level.
Hence, a threshold level V.sub.p1 when the switching transistor 5 is ON is obtained by ##EQU1##
where R1, R2 and R3 represent the resistance values of the resistors 1, 2 and 3, and V.sub.sat represents a collector-emitter voltage of a saturation when the transistor 5 is ON.
A threshold level V.sub.p2 when the switching transistor 5 is OFF is obtained by ##EQU2##
Hence, when the output of the comparator 4 is not of high level, the switching circuit 5 is turned OFF, so that the threshold level is set to V.sub.p2. For this reason, when the voltage input to the comparator 4 increases to above V.sub.p2 under this condition, the output of the comparator 4 is inverted from low level to high level. Since, after the output is inverted to high level, the switching circuit 5 is turned ON so that the threshold level is set to V.sub.p1, which is lower than V.sub.p2, the output of the comparator 4 does not inverted from high level to low level until the input voltage decreases to below V.sub.p1 (See FIG. 2).
A maximum hysteresis width .DELTA.V of input and output characteristic of the comparator 4 is obtained by ##EQU3##
Thus, the maximum hysteresis width .DELTA.V is set so that the output does not vibrate due to noise components superposed on the input voltage.
However, in this conventional hysteresis circuit, since the threshold level is varied by connecting a voltage divided point b between the resistors 2 and 3 serving as a voltage divider to ground through the collector and emitter lines of the switching transistor 5, the setting of the maximum hysteresis width .DELTA.V includes the saturation voltage V.sub.sat of the transistor 5 which varies according to the temperature. As a result, the maximum hysteresis width .DELTA.V varies according to the temperature.
Moreover, since the saturation voltage V.sub.sat of the transistor 5 is difficult to control, it is difficult to finely set the maximum hysteresis width .DELTA.V.